HIGH PERFORMANCE VLSI INTEGER TRANSFORM ARCHITECTURE FOR HEVC (International Journal of Life Sciences Biotechnology and Pharma Sciences, 2022)
High Efficiency Video Coding (HEVC) is currently being prepares as the modern videocoding standard of the video coding Experts Group and the International Standard Organization /International Electro- technical Commission (ISO/IEC) Moving Picture Experts Group. VLSIArchitecture is proposed for the HEVC encoder. The VLSI architecture is based on signed bittransform (SBT) matrix which contains only 0, 1 or -1. These SBT matrices are very simple and havelower bit width and reduce number of addition operations because it contains many zero elements.So here adder reuse strategy can be used. Hence power consumption and area consumption arereduced. So the VLSI architecture can be synthesized with proper area and high speed. Theproposed transform hardware architecture can process video data with higher speed and reducedarea.